cprog.py

Created by famille-bvc

Created on May 11, 2023

1.77 KB


*** mapping ***

NET ''variable'' LOC = brocheFPGA;

Exemple : 
Mapper l'afficheur 7 segments et la sortie logique U_e.

On donne dans l'énoncé :
  
SEG : out STD_LOGIC_Vector(6 downto 0);
Segment A = BrocheFPGA E14
Segment B = BrocheFPGA G13
Segment C = BrocheFPGA N15
Segment D = BrocheFPGA P15
Segment E = BrocheFPGA R16
Segment F = BrocheFPGA F13
Segment G = BrocheFPGA N16
Sortie logique U_e = BrocheFPGA E13

Le mapping est donc :
  
NET ''SEG[0]'' LOC = E14;
NET ''SEG[1]'' LOC = G13;
NET ''SEG[2]'' LOC = N15;
NET ''SEG[3]'' LOC = P15;
NET ''SEG[4]'' LOC = R16;
NET ''SEG[5]'' LOC = F13;
NET ''SEG[6]'' LOC = N16;
NET ''U_e'' LOC = E13;

///////////////////////////////

*** Diagramme ***

Asynchrone -> Reset à l'intérieur 

Case Sreg0 is
  When bulle_A =>
    If condition then 
      Sreg0 <= bulle_B;
      Variable_a = 5; //Affectation dans le if donc sur la flèche
    End if;
  When bulle_B => 
    Variable_B = 10; //Affectation hors du if donc dans la bulle
    If condition then 
      Sreg0 <= Bulle_A 
    End if;

///////////////////////////////

*** with select ***

with a select 
  b <= "1000" when "00",
           "0100" when "01",
           "0010" when "10",
           "0001" when others ;
           
Première ligne : b prend la valeur ‘’1000’’ si a = ‘’00’’
Seconde ligne : b prend la valeur ‘’0100’’ si a = ‘’01’’
...

Ne pas oublier la valeur par défaut : « when others »

///////////////////////////////

*** affectation conditionnelle ***

variable <= '...' when (condition 1);
variable <= '...' when (condition 1) else '...' when (condition 2);
variable <= '...' when (condition 1) else '...';

ex :
a <= 1 when (b = '1') else 2 when (b = '0') else 0;
a prend la valeur de 1 si b = '1' sinon a prend la valeur de 2 si b = '0' 
sinon a prend la valeur de 0


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