entityarchitecture3.py

Created on May 02, 2024

591 Bytes

synchronisation de signaux externes.
Ecrire l’entité et l’architecture 
d'un composant sync_inp destiné
à synchroniser sur front montant 
d'horloge les informations 
provenant des entrées externes. 
Il s'agit d'un verrou comme 
indiqué en cours de contrôle.

entity synch_inp is 
 Port ( clk : in STD_LOGIC; 
  async_i : in STD_LOGIC; 
  sync_o : out STD_LOGIC); 
end synch_inp; 

architecture Behavioral of synch_inp is 
begin 
  process (clk) 
  begin 
    if clk'event and clk='1' then 
      sync_o <= async_i; 
    end if; 
end process; 
end Behavioral;

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